What the standard defines
PCI Express is the link between a host and an expansion card or a drive, and PCI-SIG publishes it as a base specification revised by generation. Version 4.0 doubles the per-lane transfer rate of the generation before it, at 16 GT/s on each lane.
A link is described by two numbers, and both are needed. The generation gives the rate per lane; the lane count — written ×1, ×2, ×4, ×8, ×16 — gives how many lanes are running. Doubling the generation and halving the lanes lands in roughly the same place, which is why a four-lane 4.0 link and an eight-lane 3.0 link are comparable and a four-lane 4.0 link and a four-lane 3.0 link are not.
Links train in both directions. A 4.0 card in a 3.0 slot runs at 3.0; a 3.0 card in a 4.0 slot runs at 3.0; and the lane count is negotiated the same way, so a four-lane card in a single-lane socket comes up at one lane rather than refusing. Everything works, quietly, at the lower figure — which is the property that makes the two numbers worth checking rather than assuming.
What it does not promise
It does not promise a drive’s speed. The generation is the ceiling on the link, and a solid-state drive’s own behaviour is published separately: a burst rate while a fast write cache absorbs the data, and a lower sustained rate once it is full. Makers who publish both label them, and the second is the figure that governs a large copy.
It does not promise the slot is wired the way it looks. A physically long socket may be connected to fewer lanes than its length suggests, and which sockets share lanes with which — and what happens to one when a drive is fitted to another — is written in the motherboard manual rather than moulded into the plastic.
It does not promise a cool drive. The higher generations run warmer and step back when they get too hot, so the heatsink and the airflow around the socket are part of the specification in practice.
And it does nothing for a drive in a USB enclosure. There, the enclosure’s own link is the ceiling, and the drive’s generation is invisible behind it.
What it works alongside
The same lanes reach add-in cards, M.2 sockets and the connectors used for drives in bays, so a generation is a property of the link rather than of a shape. Interoperation between generations is complete in both directions at the lower of the two — which is the reason a machine can be upgraded one part at a time.
The questions that come up before an order
What happens to a PCIe 4.0 drive in a PCIe 3.0 slot?
It works, at the earlier generation’s rate. The link trains to the highest generation and the widest lane count both ends support, in either direction, so an older card in a newer slot behaves the same way.
Does a faster bus mean a faster drive?
Only up to the drive. The bus is a ceiling; what a drive sustains once its fast write cache is exhausted is a separate published figure, and on many models it is a fraction of the peak quoted on the box.
Last reviewed 9 September 2026